The relatively recent development of the semi-conductor has fairly revolutionized the electronics industry. The development of transistors and integrated circuits has induced the rethinking of manufacturing philosophies and has been responsible, in significant part, for the availability of many new products not previously commercially feasible because of size and expense constraints.
The revolution has greatly affected the consumer oriented market. While only a few decades ago products such as pocket calculators were virtually unimaginable, the new semi-conductor technologies have made them a reality.
This electronics revolution has not, however, been restricted to the consumer market. Rather, its effects have impacted even more significantly upon the industrial, governmental, and defense markets.
A basic motivation in the development of the integrated circuit was a desire by manufacturers of semi-conductors to improve performance beyond that obtained by transistors and to reduce costs. The integrated circuits did accomplish this goal, but, as in the case of virtually all manufactured products, defects can be introduced into units as various processes are performed in the manufacturing steps. Manufacturers of integrated circuits do, therefore, observe quality control procedures in order to maximize the performance characteristics of integrated circuit units they manufacture.
To this end, various types of IC testers have been developed. These testers can assume one of a multiplicity of forms. They can be large consoles or comparatively small test sets. Contacts of the tester are electronically connected to corresponding contacts of an IC chip carrier at a test site of a chip carrier handler apparatus. The tester is connected to the test site by appropriate means, and, as a multiplicity of chip carriers are consecutively processed by the handler, each is brought into engagement with contacts at the test site.
Many of the tester apparatuses commercially available in the marketplace are capable of high speed testing wherein each integrated circuit can be tested in a period of microseconds. Typically, as many as three integrated circuits can be tested per second. For this reason, it is necessary that a handler for feeding the chip carriers into a test site for testing be capable of operating at a high speed.
While speed is a necessary characteristic for a chip carrier handler, it is equally important, if not more important, that the carriers be handled in a manner such that damage thereto is minimized. The typical IC semi-conductor is mounted to a ceramic substrate and connected to contact pads located proximate the periphery of the substrate by one of a number of methods. These methods include the nail head bond method, the flip chip method, and the beam lead method. The IC, as mounted to the ceramic substrate, is, thereafter, overlain with a plastic layer or a resin having appropriate characteristics in order to protect the silicon chip.
A ceramic substrate is utilized for a number of reasons. Not only does ceramic material have appropriate electrical conductivity properties, but it also has a high co-efficient of heat conductivity so that heat generated within the IC during its operation in a device in which it is subsequently installed is dissipated away from the chip for protective purposes.
Nevertheless, ceramics do have certain characteristics which, although not outweighing the advantages obtained by using a ceramic material, can be fairly significant. Specifically, ceramic material tends to be fragile, and the ceramic substrate portion of chip carriers can become fractured during handling if adequate steps are not taken to protect the carrier.
Prior art devices for handling chip carriers have, typically, relied upon frictional engagement between the carriers and tracks upon which the carriers are allowed to slide in passing through a feed magazine. In order to overcome the coefficient of friction between the carriers and the surface of the track, the magazine has been angled at a sufficient degree in order to overcome the coefficient of friction. Tracks have often had to be angled as much as 35.degree. relative to the horizontal.
Such attempted solutions have created certain problems of their own. These problems include the possibility of damage to the carriers as a result of the generation of momentum once the coefficient of friction has been overcome.
An additional problem which such an attempted solution presents is the possibility of damage resulting to the carriers because of the abrasion between the carriers and the surface of the track. Again, because of the fragile nature of ceramic substrates, a number of the carriers can be damaged beyond their ability to be used.
Similarly, movement of chip carriers through classification bins at the output end of a handler has been accomplished in a like manner. The classification bins have merely been angled to a sufficient degree so that the force of the carriers along the track surfaces will be sufficient to overcome the coefficient of friction between the carriers and those surfaces.
Because of the environments in which integrated circuits are designed to operate, it is desirable that chip carriers incorporating such integrated circuits be brought at least to a temperature to which they will be raised when placed in devices in which they are intended to function prior to the performance of any testing of quality of operation. Further, it is desirable that the temperature be maintained not only through the period during which the carriers are fed to the test site, but also until the testing is completed. Actual operating conditions are, thereby, simulated.
It is to these and other problems in the prior art that the invention of the present application is directed. It provides a system for both heating and soft handling of carriers as they are fed toward the test site and distributed in classification bins.